PL5500是一款大电流、双向四管升降压控制器 样品订购
一、产品详情
1、产品特征：
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输入电压范围：3.5V-32V
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输出电压范围：2.0V-30V
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可编程开关峰值电流：20A
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开关频率：150kHz/300kHz
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支持1-6串充电
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支持PWM调压、调电流
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支持欠压保护、过压保护、过流保护、短路保护和过温保护等
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封装：QFN4x4-32
2、应用原理图：
PL5500应用原理图
3、产品描述
PL5500 是一款同步 4 开关双向降压-升压型控制器，能够调节高于或低于输入电压的输出电压。PL5500 可在 3.6 V 至 32 V（最大 36 V）的宽输入电压范围内工作，支持各种应用。PL5500 可在充电器模式下为 1、2、3、4、5 和 6 节电池充电。
PL5500 在降压、升压和降压-升压工作模式下采用恒定导通时间控制，可实现出色的负载和线路调节。根据 FREQ 引脚和 GND 引脚之间电阻值的不同，开关频率可设置为 150kHz、300kHz、600kHz 或 1200kHz。该器件还具有可编程软启动功能，并提供各种保护功能，包括逐周期电流限制、输入欠压锁定（UVLO）、输出过压保护（OVP）、输入过压保护、热关断和输出短路保护等。
当 OTG 为高电平时，VADJ、IADJ 引脚用于在电池放电模式下对输出 VBUS 电压和输出电流限制进行编程，这使得 PL5500 成为 USB 电源交付 (PD) 应用的绝佳选择。PL5500 提供电压控制环、恒流环、热调节环和电池温度传感器，是电池充电管理的完美解决方案。
4、典型应用场景
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车载电子
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新能源供电系统
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便携式设备
5、封装信息
PL5500顶视图
PL5500背视图
PL5500侧视图
6、管脚定义和功能描述
PL5500管脚定义图
管脚功能描述
| 序号 | 名称 | 描述 |
|---|---|---|
| 1 | VADJ | Connect a 0-2V analog voltage or a PWM signal to program voltage reference on VREF pin. Connect this pin to VDD will force VREF to constant 2V. |
| 2 | IADJ | Connect a 0-2V analog voltage or a PWM signal to program voltage reference on IREF pin. Connect this pin to VDD will force IREF to 2V. |
| 3 | VSET | Connect a resistor between VSET and GND to program battery cell type (4.2V, 4.35V, 4.4V, 4.5V) when OTG is low and PL5500 is working in battery charging mode. When OTG is higher than 1.2V, voltage on VSET pin will be proportional to voltage difference between CSP2 and CSN2. Application processor can use this information to monitor discharging current in battery discharging mode. |
| 4 | IREF | Reference voltage for input and output current limiting loop. |
| 5 | VREF | Voltage reference for voltage control loop |
| 6 | BRCOM | Battery internal resistance compensation. The voltage on this pin will be proportional to voltage difference between CSP1 and CSN1. Application processor can use this information to monitor charging current in battery charging mode. |
| 7 | MODE | CCM/DCM mode set pin. Float can set the part operates in DCM mode in light-load,connecting this pin to GND set the part operates in CCM mode. Mode is pulled high internally by a high value resistor. |
| 8 | STAT | Charging status display when OTG=Low. PGOOD signal when OTG=High. |
| 9 | FREQ | Connect to GND to set the switching frequency at 150kHz. Connect this pin to VDD to set switching frequency at 300kHz. Connect to a resistor divider between VDD and GND to set frequency to 600k and 1200k Hz. |
| 10 | COMP | Error Amplifier output. |
| 11 | VREG | Add a resistor divider to program VBUS regulation voltage. When VBUS is pulled down to be close to VREG setting point due to heavy charging current in battery charging mode, the VREG regulation loop will take over the control and lower down charging current to keep VBUS from being further pulled down. VREG is not active in discharging mode. |
| 12 | FB2 | VBUS voltage feedback. Connect a resistor divider between VBUS and GND to FB2 to program VBUS voltage in battery discharging mode. |
| 13 | CSN2 | The minus input of output current sense. |
| 14 | CSP2 | The positive input of output current sense. |
| 15 | VBUS | VBUS voltage |
| 16 | HG2 | High side MOSFET driver 2. |
| 17 | BST2 | Boost pin for high side MOSFET driver 2. |
| 18 | SW2 | Connect this pin to the Switching point 2 of the power stage. |
| 19 | LG2 | Low side MOSFET driver output 2. |
| 20 | VCC | 5.0V power supply for high side and low side driver |
| 21 | LG1 | Low side MOSFET driver output1. |
| 22 | SW1 | Connect this pin to the Switching point1 of the power stage. |
| 23 | BST1 | Boost pin for high side MOSFET driver1. |
| 24 | HG1 | High side MOSFET driver1. |
| 25 | VBAT | Battery voltage or Input voltage. |
| 26 | CSP1 | The positive input of input current sense. |
| 27 | CSN1 | The minus input of input current sense. |
| 28 | EN | Logic High will enable the converter. Logic Low will disable the whole PL5500 . EN is pulled high internally by a high value resistor. |
| 29 | CELLS | Connect a resistor divider between VDD and GND to program battery cells. |
| 30 | OTG | Connect OTG to 0 to set PL5500 in battery charging mode. Connect OTG to Mode to set PL5500 in battery discharging mode. |
| 31 | TS | Batter temperature sense |
| 32 | VDD | 5.4V power supply for PL5500 control core. |
二、技术文档
| 类型 | 标题 | 上传时间 | 文档下载 |
| 产品规格书（英文） | PL5500_Datasheet_en_ r1.1 | 2025/04/24 | PDF下载 |
三、应用方案
| 序号 | 标题 |
| 1 |
电动工具及电池包方案
电动工具及电池包方案
|
| 2 |
移动储能电源方案
移动储能电源方案
|
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